PART |
Description |
Maker |
M29W160ET M29W160EB70N6 M29W160EB90N6E M29W160EB70 |
16 Mbit (2Mb x8 or 1Mb x16, Boot Block) 3V Supply Flash Memory
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Numonyx B.V
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M29F160BT70N6T M295V160BB55N1T M295V160BB55N3T M29 |
16 MBIT (2MB X8 OR 1MB X16, BOOT BLOCK) SINGLE SUPPLY FLASH MEMORY 16 Mbit 2Mb x8 or 1Mb x16, Boot Block Single Supply Flash Memory
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ST Microelectronics STMICROELECTRONICS[STMicroelectronics]
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M29W160DT90ZA6T M29DCL3-16T M29W160DB M29W160DB70M |
From old datasheet system 16 Mbit (2Mb x8 or 1Mb x16, Boot Block) 3V Supply Flash Memory
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STMICROELECTRONICS[STMicroelectronics] ST Microelectronics
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M27V160-100K1 |
16 MBIT (2MB X8 OR 1MB X16) LOW VOLTAGE UV EPROM AND OTP EPROM
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ST Microelectronics
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M295V160BB70N1T M29F160 M295V160BB55N1T M295V160BT |
16 Mbit 2Mb x8 or 1Mb x16, Boot Block Single Supply Flash Memory 16 Mbit 2Mb x8 or 1Mb x16 / Boot Block Single Supply Flash Memory 8-Bit, 0.1 us Dual MDAC, Parallel Input, Fast Control Signalling for DSP, Easy Micro I/F 20-PLCC -25 to 85 16-Bit Bus Transceiver with 3-State Outputs 56-BGA MICROSTAR JUNIOR -40 to 85 16兆位Mb x81兆x16插槽,启动座单电源闪 16 Mbit 2Mb x8 or 1Mb x16, Boot Block Single Supply Flash Memory 16兆位Mb x81兆x16插槽,启动座单电源闪 8-Bit, 0.1 us Dual MDAC, Parallel Input, Fast Control Signalling for DSP, Easy Micro I/F 20-PDIP -40 to 85 16兆位Mb x81兆x16插槽,启动座单电源闪 16-Bit Transparent D-Type Latch With 3-State Outputs 48-TVSOP -40 to 85 16兆位Mb x8兆x16插槽,启动座单电源闪 16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs 48-TVSOP -40 to 85 16兆位Mb x8兆x16插槽,启动座单电源闪
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ST Microelectronics 意法半导 STMicroelectronics N.V.
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M36W0R6050B0ZAQT |
64 Mbit (4Mb x16, Multiple Bank, Burst) Flash Memory and 32 Mbit (2Mb x16) PSRAM, Multi-Chip Package
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ST Microelectronics
|
M29DW324DB70ZA6 M29DW324DB70ZA6F M29DW324DB70ZE6F |
CABLE ASSEMBLY; LEAD-FREE SOLDER; N MALE TO N FEMALE; 50 OHM, RG225/U COAX, DOUBLE SHIELDED 32 Mbit 4Mb x8 or 2Mb x16, Dual Bank 16:16, Boot Block 3V Supply Flash Memory 32兆位4Mb的x8或功能的2Mb x16插槽,双66分,启动V电源快闪记忆 32 Mbit 4Mb x8 or 2Mb x16, Dual Bank 16:16, Boot Block 3V Supply Flash Memory 32兆位4Mb的x8或功能的2Mb x16插槽,双66分,启动3V电源快闪记忆 32 Mbit 4Mb x8 or 2Mb x16, Dual Bank 16:16, Boot Block 3V Supply Flash Memory 32兆位4Mb的x8或功能的2Mb x16插槽,双1616分,启动V电源快闪记忆 32 Mbit 4Mb x8 or 2Mb x16 / Dual Bank 16:16 / Boot Block 3V Supply Flash Memory
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SGS Thomson Microelectronics 意法半导 STMicroelectronics N.V. ST Microelectronics
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M36W216TI-ZAT M36W216BIZA M36W216TIZA M36W216TI70Z |
16 Mbit 1Mb x16, Boot Block Flash Memory and 2 Mbit 128Kb x16 SRAM, Multiple Memory Product 16兆x16插槽,开机区块快闪记忆体兆位128KB的x16的SRAM,多个存储产 16 Mbit 1Mb x16, Boot Block Flash Memory and 2 Mbit 128Kb x16 SRAM, Multiple Memory Product 16兆x16插槽,开机区块快闪记忆体2兆位128KB的x16的SRAM,多个存储产 PV76L14-18P
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http:// STMicroelectronics N.V. 意法半导
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M36DR232A M36DR232BZA M36DR232AZA |
32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 2 Mbit 128K x16 SRAM, Multiple Memory Product 32兆位Mb x16插槽,双行,页闪存和2兆位128K的x16的SRAM,多个存储产
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STMicroelectronics N.V. http://
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M36W432BG M36W432BG70ZA1T M36W432BG70ZA6T M36W432B |
32 Mbit 2Mb x16, Boot Block Flash Memory and 4 Mbit 256Kb x16 SRAM, Multiple Memory Product
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STMICROELECTRONICS[STMicroelectronics]
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M38230G4-XXXFP M38230G4-XXXHP M38231G4-XXXHP M3823 |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V 36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V 18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V 72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V 72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机 72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机 SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机 72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机 Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
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Renesas Electronics Corporation. Renesas Electronics, Corp.
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